Semiconductor Engineering

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. “Transport triggered architectures ...
EDN

A short primer on instruction set architecture

In computer science, an instruction set architecture (ISA) is an abstract model of a computer. It’s also referred to as architecture or computer architecture. Moreover, a central processing unit (CPU) ...
CRN

Qualcomm Acquires RISC-V Chip Designer Ventana To Boost CPU Efforts

Qualcomm said Wednesday that it has acquired Ventana Micro Systems, a startup that was focused on developing server CPU ...
EDN

Instruction Set Architecture

Instruction Set Architecture (ISA) is a set of instructions defined for the processor’s architecture. These are the instructions that the processor understands. It defines the hardware and software ...
New Electronics

Qualcomm acquires Ventana Micro Systems to boost RISC-V CPU development

Qualcomm has announced the acquisition of Ventana Micro Systems, a move aimed at strengthening its CPU portfolio through ...
inc42

What Is Chip Architecture? Here’s All You Need to Know

In semiconductors, architecture refers to the instruction set architecture (ISA), a detailed set of rules and specifications governing how a chip processes data and executes instructions. This ISA ...
AppleInsider

Apple investigating RISC-V instruction set architecture, job listing shows

A job listing posted to Apple's website this week reveals the company is researching RISC-V instruction set architecture solutions, suggesting future in-house chip designs might implement the ...
TechNode

SILICON | Loongson promises self-reliance with new architecture

Every Wednesday and Friday, TechNode’s Briefing newsletter delivers a roundup of the most important news in China tech, straight to your inbox. Sign up Last week, Chinese processor company Loongson ...
Semiconductor Engineering

Implementing Cryptographic Algorithms for the RISC-V Instruction Set Architecture in Two Cases

This new technical paper titled “Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms” was published by researchers at Intel, North Arizona University and Google, with ...
insideHPC

IBM Opens POWER Instruction Set Architecture

This week at The Linux Foundation Open Source Summit, IBM announced it is opening the POWER Instruction Set Architecture (ISA). With the ISA and other technologies being contributed to the open ...
Ars Technica

Instruction Set Architecture (ISA)

Back in the early days of computing, manufacturers didn’t build a whole line of software-compatible computer systems where each system was aimed at a different price/performance point. Instead, each ...
Hackaday

instruction set architecture

An Instruction Set Architecture (ISA) defines the software interface through which for example a central processor unit (CPU) is controlled. Unlike early computer systems which didn’t define a ...