Network World

Cray to unite scalar, vector computer architectures

Cray plans to create a new supercomputing platform combining four types of processing capability in a blade server architecture. Cray Inc. plans to create a new supercomputing platform combining four ...
WDAF-TV

X- Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core

The Open-Standard C-GPU solutions, offered as IP blocks and software, enable leading processor companies to develop low-power SoCs for Next Generation 3D Graphics, Compute, and AI/ML enabled wearables ...
Business Wire

SiFive Intelligence for Modern ML Architectures Presentation at Linley Spring Processor Conference

SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Chris Lattner, President of Engineering and ...
Semiconductor Engineering

Multi-Core Architecture Optimized For Time-Predictable Neural Network Inference (FZI, KIT)

A new technical paper titled “MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference” was published by researchers at FZI Research Center for Information ...
TechSpot

Intel AVX10, APX are the next step in the x86 instruction set evolution

Why it matters: Intel is gearing up for what the company considers the "next major step" in the evolution of the original x86 instruction set architecture (ISA). The Santa Clara corporation is ...