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MIT finds a new way to pack more transistors on a chip

For decades, chipmakers have squeezed more computing power out of silicon by shrinking transistors, but that strategy is ...
IEEE

A Wideband Inductorless Programmable Gain Amplifier Using 90-nm CMOS for High-Speed Communication

Abstract: This paper presents a wideband inductorless programmable gain amplifier (PGA) for high-speed communication. The proposed circuit employs a Cherry-Hooper amplifier structure as the gain cell ...
IEEE

A 59.2–83.3 GHz CMOS LNA With 18.1 dB Gain and 5.1 dB NF Using Gate-Drain Transformer

Abstract: An E-band low-noise amplifier (LNA) is proposed for 6G applications. It employs three cascode amplifier stages, each utilizing a gate-drain transformer as the load. To extend the gain ...